Links:
Controlix XP-Dev project home page: https://controlix.xp-dev.com/summary/1348
Controlix FAQ
Q1: What is Controlix (CTX)?
A1: CTX is a computer operating system with design characteristics more
traditionally found in the integrated circuit design engineering sector (I.E.
the Electrical and/or Computer Engineering disciplines), rather than the
software design characteristics of Computer Science.
Q2: What language is CTX written in?
A2: CTX is primarily written in Verilog. The CTX project currently uses the
Verilator tool, which produces C++ code for parallel simulation on top
of pthreads.
Q3: Why use an HDL to write an operating system?
A3: Good question, with several valid answers:
A3A: Portability. Operating Systems are canonically designed with the goal
of abstracting, securing and sharing access to fixed hardware resources by
non-fixed user programs. Standard OSes are designed to share access to a
traditional CPU, which has a fixed linear memory map for both RAM and various
MMIO-interfaced devices. But, there are many other types of devices such as
DSPs, PLDs, FPGAs, etc. which to a greater or lesser extent all execute instruction
streams. Wouldn’t it be nice to be able to use the same systems code on all of
those devices?
A3B: Security. Verilog tools will generate simulations of the provided code,
simulating away the deadlock potential in the process, which removes the worry
over races and priority inversions – the bane of traditional parallel software
development. In addition, the simplicity of the Verilog abstractions allow for a
much more ‘open’ method of testbenching (simulating the circuit with artificial
input data). Hardware design flows with testbenching produce orders of magnitude
less bugs than the traditional waterfall method seen in software engineering
methodologies.
A3C: Orthogonality. Languages such as C, Ada and other systems-capable languages
are not designed for orthogonality – they do not possess critical sections or
other primitives meant to provide interlocked serialization of access to hardware
execution resources. A notable exception is Java, with the synchronized{} keyword,
which is meant to implement orthogonal parallelization of JVM bytecode execution.
A3D: Standardization. Industry is familiar with using Verilog to design
parallel systems, much moreso then a simple use of C with a simulating
compiler would provide. That huge body of expertise, tools and money would
go a long way towards ensuring the success of a huge endeavor like replacing
all of systems-land in computing with virtual circuit simulation systems,
like CTX promises.
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